A low complexity iterative channel estimation and equalisation scheme for (data-dependent) superimposed training

Channel estimation/symbol detection methods based on superimposed training (ST) are known to bemore bandwidth efficient than those based on traditional time-multiplexed training. In this paper we present an iterative version of the ST methodwhere the equalised symbols obtained via ST are used in a second step to improve the channel estimation, approaching the performance of the more recent (and improved) data dependent ST (DDST), but now with less complexity. This iterative ST method (IST) is then compared to a different iterative superimposed training method of Meng and Tugnait (LSST).We show via simulations that the BER of our IST algorithm is very close to that of the LSST but with a reduced computational burden of the order of the channel length. Furthermore, if the LSST iterative approach (originally based on ST) is now implemented using DDST, a faster convergence rate can be achieved for the MSE of the channel estimates

Synchronisation of the superimposed training method for channel estimation in the presence of DC-offset

The superimposed training method estimates the channel from the induced first-order cyclostationary statistics exhibited by the received signal. In this paper, using vector space decomposition, we show that the information needed for training sequence synchronisation, and for DC-offset estimation, can be extracted from the first-order cyclostationary statistics as well. Necessary and sufficient conditions for channel computation and equalisation are derived, when training sequence synchronisation and DC-offset removal are required. The computational burden of the practical implementation of the method presented here is much lighter than for existing algorithms. At the same time, simulation results show that the performance, in terms of the MSE of the channel estimates and BER, is not diminishedwhen compared to these existing algorithms

Time-varying channel estimation using two-dimensional channel orthogonalization and superimposed training

In this correspondence, a method is presented for estimating double-selective channels using superimposed training (ST). The estimator is based on a subspace projection of the time-varying channel onto a set of two dimensional orthogonal functions. These functions are formed via the outer product of the discrete prolate spheroidal basis vectors and the universal basis vectors. This approach allows the channel to be expanded in both the time-delay and time dimensions with the fewest parameters when incomplete channel statistics are given. This correspondence also provides a theoretical performance analysis of the estimation algorithm and its corroboration via simulations. It is shown that this new method provides an enhancement in channel estimation when compared with state-of-the-art approaches. © 2012 IEEE

Three new teosintes (Zea spp., Poaceae) from México

In this correspondence, a method is presented for estimating double-selective channels using superimposed training (ST). The estimator is based on a subspace projection of the time-varying channel onto a set of two dimensional orthogonal functions. These functions are formed via the outer product of the discrete prolate spheroidal basis vectors and the universal basis vectors. This approach allows the channel to be expanded in both the time-delay and time dimensions with the fewest parameters when incomplete channel statistics are given. This correspondence also provides a theoretical performance analysis of the estimation algorithm and its corroboration via simulations. It is shown that this new method provides an enhancement in channel estimation when compared with state-of-the-art approaches. " 2012 IEEE.",,,,,,"10.1109/TSP.2012.2195658",,,"http://hdl.handle.net/20.500.12104/45377","http://www.scopus.com/inward/record.url?eid=2-s2.0-84863915619&partnerID=40&md5=999d690a1bfc9798103a77e74fb5d946",,,,,,"8",,"IEEE Transactions on Signal Processing",,"443

Architecture based on array processors for data-dependent superimposed training channel estimation

Channel estimation is a challenging problem in wireless communication systems because of users mobility and limited bandwidth. A plethora of methods based on pilot assisted transmissions (PAT) have been proposed in most practical systems to overcome this problem, but with the penalty of extra bandwidth consumption for training. Channel estimation based on superimposed training (ST) has emerged as an alternative in recent years because it saves valuable bandwidth by adding a training periodic sequence to the data signal instead of multiplexing them. However, although ST and one of its variants, known as data dependent ST (DDST), have been an active research topic, only few physical implementations of such estimators have been reported to date. In this work a full-hardware architecture based on array processors (AP) for DDST channel estimation is presented and it is compared with previous approaches. The design was described using Verilog HDL and targeted in Xilinx Virtex-5 XC5VLX110T. The synthesis results showed a slices consumption of 3% and a frequency operation of the 115 MHz. A Monte Carlo simulation demonstrates that the mean square error (MSE) of the channel estimator implemented in hardware is practically the same than the one obtained with the floating-point golden model. The high performance and reduced hardware of the proposed channel estimator allows us to conclude that it can be utilized in practical DDST receivers developments. Zapotitlán 2011 IEEE